NawfalMotii79 /PLFM_RADAR

Open-source, low-cost 10.5 GHz PLFM phased array RADAR system

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PLSQLCreated 2026-03-08
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README

AERIS-10: Open Source Pulse Linear Frequency Modulated Phased Array Radar









AERIS-10 is an open-source, low-cost 10.5 GHz phased array radar system featuring Pulse Linear Frequency Modulated (LFM) modulation. Available in two versions (3km and 20km range), it's designed for researchers, drone developers, and serious SDR enthusiasts who want to explore and experiment with phased array radar technology.

!AERIS-10 Antenna Array

 📡 Overview

The AERIS-10 project aims to democratize radar technology by providing a fully open-source, modular, and hackable radar system. Whether you're a university researcher, a drone startup, or an advanced maker, AERIS-10 offers a platform for experimenting with beamforming, pulse compression, Doppler processing, and target tracking.

 🔬 Key Features

- Open Source Hardware & Software - Complete schematics, PCB layouts, firmware, and software available
- Dual Version Availability:
  - AERIS-10N (Nexus): 3km range with 8x16 patch antenna array
  - AERIS-10E (Extended): 20km range with 32x16 dielectric-filled slotted waveguide array
- Full Electronic Beam Steering - ±45° electronic steering in elevation and azimuth
- Advanced Signal Processing - On-board FPGA handles pulse compression, Doppler FFT, MTI, and CFAR
- Python GUI - User-friendly interface with map integration
- GPS/IMU Integration - Real-time position and attitude correction
- Modular Design - Separate power management, frequency synthesis, and RF boards

 🏗️ System Architecture

!AERIS-10 System Diagram

 Hardware Components

The AERIS-10 main sub-systems are:

- Power Management Board - Supplies all necessary voltage levels to the electronics components with proper filtering and sequencing (sequencing ensured by the microcontroller)

- Frequency Synthesizer Board - Uses a high-performance Low Jitter Clock Generator (AD9523-1) that supplies phase-aligned clock references for:
  - RX and TX Frequency Synthesizers (ADF4382)
  - DAC
  - ADC
  - FPGA

- Main Board containing:
  - DAC - Generates the RADAR Chirps
  - 2x Microwave Mixers (LTC5552) - For up-conversion and IF-down-conversion
  - 4x 4-Channel Phase Shifters (ADAR1000) - For RX and TX chain beamforming
  - 16x Front End Chips (ADTR1107) - Used for both Low Noise Amplifying (RX) and Power Amplifying (TX) stages
  - XC7A50T FPGA - Handles RADAR Signal Processing on the upstream FTG256 board:
    - PLFM Chirps generation via the DAC
    - Raw ADC data read
    - Hybrid Automatic Gain Control (AGC) — cross-layer FPGA/STM32/GUI loop
    - I/Q Baseband Down-Conversion
    - Decimation
    - Filtering
    - Forward FFT
    - Pulse Compression
    - Doppler, MTI and CFAR processing
    - USB Interface
  - STM32F746xx Microcontroller - Used for:
    - Power-up and power-down sequencing (see Power Management Excel File)
    - FPGA communication
    - Setup and Interface with:
      - Clock Generator (AD9523-1)
      - 2x Frequency Synthesizers (ADF4382)
      - 4x 4-Channel Phase Shifters (ADAR1000) fo

Snapshot: 2026-11-10T09:35:25Z · Data license Apache-2.0 · JSON